RFR (XS): 8215888: Register to register spill may use AVX 512 move instruction on unsupported platform

Viswanathan, Sandhya sandhya.viswanathan at intel.com
Fri Dec 21 19:44:52 UTC 2018


Hi All,

We noticed that the register to register moves in x86.ad file attempt to generate emovdqu when UseAVX==2.
The instruction emovdquq is only supported on platforms where UseAVX > 2 (AVX 512).

The following rules in x86.ad file need to be corrected:
MoveVecX2Leg
MoveLeg2VecX
MoveVecY2Leg
MoveLeg2VecY
The above move rules when activated through register allocator could result in illegal instruction exception.

Bug:
https://bugs.openjdk.java.net/browse/JDK-8215888

This bug affects versions 11.0.2, 12 and the mainline.

Webrev for jdk mainline:
http://cr.openjdk.java.net/~sviswanathan/8215888/webrev.00/

This webrev passes jtreg compiler tests on Haswell and SKX.

Best Regards,
Sandhya

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