[11] RFR (XS): JDK-8198293: AARCH64 - Add CPU detection code for Cavium Thunder X2
Dmitry Chuyko
dmitry.chuyko at bell-sw.com
Fri Feb 16 16:35:10 UTC 2018
Hello,
Please review a small change in vendor specific features for Cavium CPUs.
T88 should be determined more accurate with its model number.
T99 may have 2 vendor-model combinations.
Flag values for T99 are raw first approximation, I've created a separate
sub-task to check them more precisely.
rfe: https://bugs.openjdk.java.net/browse/JDK-8198293
patch: below
-Dmitry
diff -r 82d9d5744e5f src/hotspot/cpu/aarch64/vm_version_aarch64.cpp
--- a/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp Fri Feb 16
12:18:09 2018 +0100
+++ b/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp Fri Feb 16
19:15:44 2018 +0300
@@ -193,7 +193,9 @@
}
// Enable vendor specific features
- if (_cpu == CPU_CAVIUM) {
+
+ // ThunderX
+ if (_cpu == CPU_CAVIUM && (_model == 0xA1)) {
if (_variant == 0) _features |= CPU_DMB_ATOMICS;
if (FLAG_IS_DEFAULT(AvoidUnalignedAccesses)) {
FLAG_SET_DEFAULT(AvoidUnalignedAccesses, true);
@@ -202,6 +204,20 @@
FLAG_SET_DEFAULT(UseSIMDForMemoryOps, (_variant > 0));
}
}
+ // ThunderX2
+ if ((_cpu == CPU_CAVIUM && (_model == 0xAF)) ||
+ (_cpu == CPU_BROADCOM && (_model == 0x516))) {
+ if (FLAG_IS_DEFAULT(AvoidUnalignedAccesses)) {
+ FLAG_SET_DEFAULT(AvoidUnalignedAccesses, true);
+ }
+ if (FLAG_IS_DEFAULT(UseSIMDForMemoryOps)) {
+ FLAG_SET_DEFAULT(UseSIMDForMemoryOps, true);
+ }
+ if (FLAG_IS_DEFAULT(UseFPUForSpilling)) {
+ FLAG_SET_DEFAULT(UseFPUForSpilling, true);
+ }
+ }
+
if (_cpu == CPU_ARM && (_model == 0xd03 || _model2 == 0xd03))
_features |= CPU_A53MAC;
if (_cpu == CPU_ARM && (_model == 0xd07 || _model2 == 0xd07))
_features |= CPU_STXR_PREFETCH;
// If an olde style /proc/cpuinfo (cpu_lines == 1) then if _model is
an A57 (0xd07)
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