[11] RFR (XS): JDK-8198293: AARCH64 - Add CPU detection code for Cavium Thunder X2

[Dmitry Chuyko]

Dmitry,

Depending on firmware version T99 may be seen as Broadcom 0x516 or as 
Cavium 0xAF. So I'd prefer to leave per-model detection code blocks. 
Nothing common is expected here for T88 and T88.

-Dmitry C


On 02/20/2018 10:54 AM, Dmitry Samersoff wrote:
> Dmitry,
>
> I would prefer to have this code better readable/maintainable ever at
> the cost of some extra lines.
>
> i.e.
>
> if (_cpu == CPU_CAVIUM) {
>    if (_model == CAVIUM_THUNDER_X) //0xA1 {
>        ...
>    }
>    if (_model == CAVIUM_THUNDER_X2) //0xAF {
>      ...
>    }
> }
> else if (_cpu == CPU_BROADCOM ) {
>     if (_model == 0x516) {
>         ...
>     }
> }
>
> -Dmitry
>
>
> On 19.02.2018 17:22, Dmitry Chuyko wrote:
>> I also made webrev for convenience.
>>
>> webrev: http://cr.openjdk.java.net/~dchuyko/8198293/webrev.00/
>> rfe: https://bugs.openjdk.java.net/browse/JDK-8198293
>>
>> -Dmitry
>>
>> On 02/16/2018 07:37 PM, Dmitry Chuyko wrote:
>>> rfe link corrected: https://bugs.openjdk.java.net/browse/JDK-8198293
>>>
>>> On 02/16/2018 07:35 PM, Dmitry Chuyko wrote:
>>>> Hello,
>>>>
>>>> Please review a small change in vendor specific features for Cavium CPUs.
>>>>
>>>> T88 should be determined more accurate with its model number.
>>>> T99 may have 2 vendor-model combinations.
>>>>
>>>> Flag values for T99 are raw first approximation, I've created a
>>>> separate sub-task to check them more precisely.
>>>>
>>>> rfe: https://bugs.openjdk.java.net/browse/JDK-8198293
>>>> patch: below
>>>>
>>>> -Dmitry
>>>>
>>>> diff -r 82d9d5744e5f src/hotspot/cpu/aarch64/vm_version_aarch64.cpp
>>>> --- a/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp    Fri Feb 16
>>>> 12:18:09 2018 +0100
>>>> +++ b/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp    Fri Feb 16
>>>> 19:15:44 2018 +0300
>>>> @@ -193,7 +193,9 @@
>>>>     }
>>>>   
>>>>     // Enable vendor specific features
>>>> -  if (_cpu == CPU_CAVIUM) {
>>>> +
>>>> +  // ThunderX
>>>> +  if (_cpu == CPU_CAVIUM && (_model == 0xA1)) {
>>>>       if (_variant == 0) _features |= CPU_DMB_ATOMICS;
>>>>       if (FLAG_IS_DEFAULT(AvoidUnalignedAccesses)) {
>>>>         FLAG_SET_DEFAULT(AvoidUnalignedAccesses, true);
>>>> @@ -202,6 +204,20 @@
>>>>         FLAG_SET_DEFAULT(UseSIMDForMemoryOps, (_variant > 0));
>>>>       }
>>>>     }
>>>> +  // ThunderX2
>>>> +  if ((_cpu == CPU_CAVIUM && (_model == 0xAF)) ||
>>>> +      (_cpu == CPU_BROADCOM && (_model == 0x516))) {
>>>> +    if (FLAG_IS_DEFAULT(AvoidUnalignedAccesses)) {
>>>> +      FLAG_SET_DEFAULT(AvoidUnalignedAccesses, true);
>>>> +    }
>>>> +    if (FLAG_IS_DEFAULT(UseSIMDForMemoryOps)) {
>>>> +      FLAG_SET_DEFAULT(UseSIMDForMemoryOps, true);
>>>> +    }
>>>> +    if (FLAG_IS_DEFAULT(UseFPUForSpilling)) {
>>>> +      FLAG_SET_DEFAULT(UseFPUForSpilling, true);
>>>> +    }
>>>> +  }
>>>> +
>>>>     if (_cpu == CPU_ARM && (_model == 0xd03 || _model2 == 0xd03))
>>>> _features |= CPU_A53MAC;
>>>>     if (_cpu == CPU_ARM && (_model == 0xd07 || _model2 == 0xd07))
>>>> _features |= CPU_STXR_PREFETCH;
>>>>     // If an olde style /proc/cpuinfo (cpu_lines == 1) then if _model
>>>> is an A57 (0xd07)
>>>>
>