RFR(S): Vector popcount support
Vladimir Kozlov
vladimir.kozlov at oracle.com
Sat Mar 10 00:02:32 UTC 2018
Hi Razvan,
In general changes are good. Do you plans to add vpopcntb,w too?
Use 'supports' with 's' in name as in other support functions names:
supports_avx512_vpopcntdq()
Also why use avx512 in function name? I know it is CPUID bit name. But
do you have other vpopcntdq instructions, not avx512?
In assembler_x86.cpp and other places you don't need to check UseAVX,
support_avx512_vpopcntdq() is enough. You can clear feature bit in
vm_version_x86.cpp when AVX < 3:
if (UseAVX < 3) {
_features &= ~CPU_AVX512F;
_features &= ~CPU_AVX512DQ;
_features &= ~CPU_AVX512CD;
_features &= ~CPU_AVX512BW;
_features &= ~CPU_AVX512VL;
+ _features &= ~CPU_AVX512_VPOPCNTDQ;
}
In x86.ad you forgot to add length check in predicate() like next:
instruct vadd2I_reg(vecD dst, vecD src1, vecD src2) %{
predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
And, please, add code generation test to
test/hotspot/jtreg/compiler/vectorization/ tests to verify correctness
of vector operations.
Thanks,
Vladimir
On 3/9/18 2:54 PM, Lupusoru, Razvan A wrote:
> Hi everyone,
>
> As per “Intel Architecture Instruction Set Extensions and Future
> Features Programming Reference” manual [1], vector popcount instruction
> will be supported in future Intel ISA. I have updated the superword
> vectorizer to take advantage of this instruction. I have tested with
> Intel SDE [2] to confirm encoding and semantics are correctly
> implemented. Please take a look and let me know if you have any
> questions or comments.
>
> http://cr.openjdk.java.net/~rlupusoru/jdk_hs/webrev_vpopcount_01/index.html
>
> Thanks,
>
> Razvan
>
> [1]
> https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
>
> [2]
> https://software.intel.com/en-us/articles/intel-software-development-emulator
>
> [3] https://bugs.openjdk.java.net/browse/JDK-8199421
>
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