RFR(S): Vector Carry-less Multiplication support

[Rukmannagari, Shravya]

Hi everyone,

As per "Intel Architecture Instruction Set Extensions and Future Features Programming Reference" manual [1], vector carry-less multiplication (vpclmulqdq) instruction will be supported in future Intel ISA. I have updated the CRC32 algorithm to take advantage of this instruction. I have tested with Intel SDE [2] to confirm encoding and semantics are correctly implemented. Please take a look and let me know if you have any questions or comments.

http://cr.openjdk.java.net/~vdeshpande/ICL_crc32/webrev.00/

Thanks,
Shravya.

[1] https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
[2] https://software.intel.com/en-us/articles/intel-software-development-emulator
[3] https://bugs.openjdk.java.net/browse/JDK-8200067


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