[aarch64-port-dev ] Very large code caches

[Leslie Zhai]

Hi HotSpot developers,
I am trying to implement `patch_verified_entry` for other targets, such 
as riscv, but I found that:

> but the real problem is that the resulting call
> site is not MT-safe: it can't be patched atomically.  To make that
> work we'd have to move the destination address into the constant pool.

So aarch64 hasn't implemented patched *atomically* yet? And I also investigate sparc target:

    0: void NativeJump::insert(address code_pos, address entry) {
    0:   Unimplemented();
         ^ :P
    0: }
    0:
    0: // MT safe inserting of a jump over an unknown instruction sequence (used by nmethod::makeZombie)
    0: // The problem: jump_to <dest> is a 3-word instruction (including its delay slot).
    0: // Atomic write can be only with 1 word.
    0: void NativeJump::patch_verified_entry(address entry, address verified_entry, address dest) {
    0:   // Here's one way to do it:  Pre-allocate a three-word jump sequence somewhere
    0:   // in the header of the nmethod, within a short branch's span of the patch point.
    0:   // Set up the jump sequence using NativeJump::insert, and then use an annulled
    0:   // unconditional branch at the target site (an atomic 1-word update).
    0:   // Limitations:  You can only patch nmethods, with any given nmethod patched at
    0:   // most once, and the patch must be in the nmethod's header.
    0:   // It's messy, but you can ask the CodeCache for the nmethod containing the
    0:   // target address.
    0:
    0:   // %%%%% For now, do something MT-stupid:
                                           ^ :P
    0:   ResourceMark rm;
    0:   int code_size = 1 * BytesPerInstWord;
    0:   CodeBuffer cb(verified_entry, code_size + 1);
    0:   MacroAssembler* a = new MacroAssembler(&cb);
4848:   a->ldsw(G0, 0, O7); // "ld" must agree with code in the signal handler
    0:   ICache::invalidate_range(verified_entry, code_size);
    0: }

It seems not implemented already neither? please share your implementation experience, thanks a lot!

-- 
Regards,
Leslie Zhai