Can we dump more pretty CFG file format for C1 compiler HIR
Vladimir Ivanov
vladimir.x.ivanov at oracle.com
Sat Apr 20 01:44:59 UTC 2019
(BCCing hotspot-dev)
> `+XX:+PrintCFGToFile` could dump ssa-based HIR into file, but its format is messy:```cfg
> begin_states
> begin_locals
> size 3
> method "static jint com.github.kelthuzadx.HelloWorld.jerkSum(jint)"
> 1 i7 "[R570|I]"
> end_locals
> end_states
> begin_HIR
> .22 0 i15 ireturn i7 <|@
> end_HIR
> begin_LIR
> 42 label [label:0x000002136a396400] <|@
> 44 move [R570|I] [rax|I] <|@
> 46 return [rax|I] <|@
> end_LIR
> end_block
> end_cfg
> begin_intervals
> name "Before Register Allocation"
> 3 fixed "[rax|I]" 3 570 [0, 1[ [44, 46[ "no spill store"
> 4 fixed "[rdx|I]" 4 -1 [0, 4[ "no definition"
> 569 int 569 4 [4, 10[ 4 M 10 S "no spill store"
> 570 int 570 569 [10, 26[ [38, 44[ 10 M 26 S 38 M 41 L 44 S "no optimization"
> 571 int 571 573 [12, 30[ [36, 42[ 12 M 18 M 28 S 30 S 36 M 41 L "no optimization"
> 572 int 572 570 [26, 38[ 26 M 28 M 38 S "no spill store"
> 573 int 573 571 [30, 36[ 30 M 32 M 36 S "no spill store"
> end_intervals
>
>
> ```
> So can we produce more readable format?
Do you have any particular format in mind or just looking for something
more readable? Are you satisfied with what -XX:+PrintIR [1] /
-XX:+PrintLIR [2] produce?
BTW it is confusing to see -XX:+PrintCFGToFile dumping HIR/LIR info as
well when -XX:+PrintCFG dumps exclusively CFG.
Best regards,
Vladimir Ivanov
[1] -XX:+PrintIR
IR after parsing
B1 [0, 0] -> B0 sux: B0
empty stack
inlining depth 0
__bci__use__tid____instr____________________________________
. 0 0 13 std entry B0
B0 (SV) [0, 12] pred: B1
empty stack
inlining depth 0
__bci__use__tid____instr____________________________________
0 0 a5 <instance 0x00007f84fed9c2c0
klass=jdk/internal/misc/Unsafe>
4 0 l7 16L
. 9 0 i8 compareAndSetLong(a1, l7, l2, l3)
12 0 i9 1
12 0 i10 i8 & i9
. 12 0 i11 ireturn i10
[2] -XX:+PrintLIR
LIR:
B1 [0, 0] sux: B0
__id_Instruction___________________________________________
0 label [label:0x00007ffd2688a6c0]
2 std_entry
B0 std [0, 12] preds: B1
__id_Instruction___________________________________________
12 label [label:0x00007ffd268895e0]
14 leal [Base:[rsi|L] Disp: 16|J] [rsirsi|J]
16 move [rdxrdx|J] [raxrax|J]
18 move [rcxrcx|J] [rbxrbx|J]
20 cas_long [rsirsi|J] [raxrax|J] [rbxrbx|J]
22 cmove [EQ] [int:1|I] [int:0|I] [rax|I]
26 logic_and [rax|I] [int:1|I] [rax|I]
30 return [rax|I]
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