RFR(XXS): 8235288 :AVX 512 instructions inadvertently used on Xeon for small vector width operations

[Viswanathan, Sandhya]

For vector replicate and reduction operations vinsert and vextract instructions are used.
When UseAVX level is set to 3, these instructions are unnecessarily encoded with 512-bit vector width.
Only for KNL platform which doesn't support AVX512 variable length encoding, the 512-bit wide instruction need to be used.
All other Xeon platforms should use the appropriate 256-bit wide vector instruction.

JBS: https://bugs.openjdk.java.net/browse/JDK-8235288
Webrev: http://cr.openjdk.java.net/~sviswanathan/8235288/webrev.00/

Please review and approve.

Best Regards,
Sandhya