RFR(S) JDK-8225625: AES Electronic Codebook (ECB) encryption and decryption optimizations using AVX512 + VAES instructions.

[Kamath, Smita]

Hi Vladimir,

As per Intel Architecture Instruction Set Reference [1] Vector AES Encrypt and Decrypt Operations will be supported in future Intel ISA.  We would like to contribute optimizations for AES-ECB algorithm to support encryption and decryption operations using AVX512+VAES instructions. These optimizations are for x86_64 architecture that have AVX512-VAES enabled.

Shravya(cc'ed) and I are co-contributors. Shay Gueron(shay.gueron at intel.com<mailto:shay.gueron at intel.com>) and Regev Shemy (regev.shemy at intel.com<mailto:regev.shemy at intel.com>) are the authors of the algorithm.

I have tested the algorithm with Intel SDE [2] to confirm encoding and semantics are correctly implemented.



Please take a look and let me know if you have any questions or comments.
http://cr.openjdk.java.net/~vdeshpande/AES-ECB/webrev.00/

Bug Id: https://bugs.openjdk.java.net/browse/JDK-8225625

[1] https://software.intel.com/sites/default/files/managed/ad/01/253666-sdm-vol-2a.pdf  (Page 152 - 159)

[2] https://software.intel.com/en-us/articles/intel-software-development-emulator


Regards,
Smita Kamath
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