[aarch64-port-dev ] [PATCH] 8217561 : X86: Add floating-point Math.min/max intrinsics, approval request

[Andrew Dinn]

On 01/03/2019 16:01, Andrew Dinn wrote:
> My alternative patch modifies the 2D rule to work like the 4S rule i.e.
> 
> instruct reduce_max2D(vRegD dst, vRegD src1, vecX src2, vecX tmp) %{
>   . . .
>   ins_encode %{
>     __ fmaxv(as_FloatRegister($dst$$reg), __ T2D,
> as_FloatRegister($src2$$reg));
>     __ fmaxd(as_FloatRegister($dst$$reg), as_FloatRegister($dst$$reg),
> as_FloatRegister($src1$$reg));
>   %}
>   . . .

Doh! One more tweak that could be applied here is, of course, to get rid
of that redundant 'vecX tmp' argument. It almost certainly won't affect
the current benchmark figures but it does free up another vector
register which might help some real FP code.

regards,


Andrew Dinn
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