RFR: 8221404: Remove double alignment of RegMasks in Matcher

[Vladimir Kozlov]

Intel's Skylake has 64 bytes L1 cache line.
Keeping first 64 register masks bits in one cache line should help. I don't think we should do this change.

Thanks,
Vladimir

On 3/25/19 6:44 AM, Claes Redestad wrote:
> Hi,
> 
> RegMask are allocated double-aligned, which doesn't seem to have any
> real effect on any of our supported platforms. Simplify.
> 
> Bug:    https://bugs.openjdk.java.net/browse/JDK-8221404
> Webrev: http://cr.openjdk.java.net/~redestad/8221404/open.00
> 
> Testing: tier1-3 (together with JDK-8221343)
> 
> Thanks!
> 
> /Claes