RFR: 8221404: Remove double alignment of RegMasks in Matcher

[dean.long at oracle.com]

Since you are going to rework this, does it make sense to have separate 
masks for GPR and FP registers?

dl

On 3/25/19 11:16 AM, Claes Redestad wrote:
> Withdrawing with intent to rework this a bit.
>
> Notes:
>
> - A single RegMask on my Intel ivy bridge workstation is 22 4-byte mask
> words - 88 bytes - plus the 8 bytes for _lwm and _hwm, so 96 bytes. As
> double-aligning only shifts the object at most 4 bytes we'll still look
> at RegMasks that span 2 cache lines.
>
> - Quick performance runs show neutral results.
>
> - I'm having second thoughts about the utility of _lwm since it sticks
> to 0 for many (most?) masks, and my intent with removing the double-
> alignment was to make the RegMask layout more malleable to
> experimentation with layout without memory waste. I have some data that
> suggest we could improve a bit by putting watermarks and the AllStack
> bit closer to the first masks.
>
> Thanks!
>
> /Claes
>
> On 2019-03-25 18:20, Vladimir Kozlov wrote:
>> Intel's Skylake has 64 bytes L1 cache line.
>> Keeping first 64 register masks bits in one cache line should help. I 
>> don't think we should do this change.
>>
>> Thanks,
>> Vladimir
>>
>> On 3/25/19 6:44 AM, Claes Redestad wrote:
>>> Hi,
>>>
>>> RegMask are allocated double-aligned, which doesn't seem to have any
>>> real effect on any of our supported platforms. Simplify.
>>>
>>> Bug:    https://bugs.openjdk.java.net/browse/JDK-8221404
>>> Webrev: http://cr.openjdk.java.net/~redestad/8221404/open.00
>>>
>>> Testing: tier1-3 (together with JDK-8221343)
>>>
>>> Thanks!
>>>
>>> /Claes