[14] RFR (S): 8234394: C2: Dynamic register class support in ADLC

[Vladimir Ivanov]

Thanks, Vladimir.

Best regards,
Vladimir Ivanov

On 21.11.2019 20:44, Vladimir Kozlov wrote:
> +1
> 
> Vladimir K
> 
> On 11/21/19 6:10 AM, Tobias Hartmann wrote:
>> Hi Vladimir,
>>
>> looks good to me.
>>
>> Best regards,
>> Tobias
>>
>> On 19.11.19 14:40, Vladimir Ivanov wrote:
>>> http://cr.openjdk.java.net/~vlivanov/jbhateja/8234394/webrev.00/
>>> https://bugs.openjdk.java.net/browse/JDK-8234394
>>>
>>> Introduce new "placeholder" register class which denotes that 
>>> instructions which use operands of
>>> such class should dynamically query register masks from the operand 
>>> instance and not hard-code them
>>> in the code.
>>>
>>> It is required for generic vectors in order to support generic vector 
>>> operand (vec/legVec)
>>> replacement with fixed-sized vector operands 
>>> (vec[SDXYZ]/legVec[SDXYZ]) after matching is over.
>>>
>>> As an example of usage, generic vector operand is declared as:
>>>
>>> operand vec() %{
>>>    constraint(ALLOC_IN_RC(dynamic));
>>>    match(VecX);
>>>    match(VecY);
>>>    match(VecZ);
>>>    match(VecS);
>>>    match(VecD);
>>> ...
>>>
>>> Then for an instruction which uses vec as DEF
>>>
>>> x86.ad:
>>> instruct loadV4(vec dst, memory mem) %{
>>>
>>> =ADLC=>
>>>
>>> ad_x86_misc.cpp:
>>> const RegMask &loadV4Node::out_RegMask() const {
>>>    return (*_opnds[0]->in_RegMask(0));
>>> }
>>>
>>> vs
>>>
>>> x86.ad:
>>> instruct loadV4(vecS dst, memory mem) %{
>>>
>>> =ADLC=>
>>>
>>> ad_x86_misc.cpp:
>>> const RegMask &loadV4Node::out_RegMask() const {
>>>    return (VECTORS_REG_VLBWDQ_mask());
>>> }
>>>
>>>
>>> An operand with dynamic register class can't be used during code 
>>> emission and should be replaced
>>> with something different before register allocation:
>>>
>>> const RegMask *vecOper::in_RegMask(int index) const {
>>>    return &RegMask::Empty;
>>> }
>>>
>>> Contributed-by: Jatin Bhateja <jatin.bhateja at intel.com>
>>> Reviewed-by: vlivanov, sviswanathan, ?
>>>
>>> Testing: tier1-4 (both with and without generic vector operands)
>>>
>>> Best regards,
>>> Vladimir Ivanov