RFR(S/M): 8247766: [aarch64] guarantee(val < (1U << nbits)) failed: Field too big for insn

Patric Hedlin patric.hedlin at oracle.com
Tue Jul 7 14:20:47 UTC 2020


Thanks for reviewing Nils.

On 2020-07-07 15:55, Nils Eliasson wrote:
> Hi Patric,
>
> There are some minor typos in the comments. Otherwise it looks good.
>
> No re-review needed.
>
> Best regards,
> Nils
>
> src/hotspot/cpu/aarch64/assembler_aarch64.hpp:
>
> "// Scaled unsigned offset, ecoded in an unsigned imm12:_ field."
>
> ecoded -> encoded
> imm12:_ field.  -> imm12 field
>
> "// Unscaled signed offset, ecoded in a signed imm9 field."
>
> ecoded -> encoded
>
> "// Scaled unsigned offset, ecoded in an unsigned imm12:_ field."
>
> ecoded -> encoded
> imm12:_ field.  -> imm12 field
>
Ok, that was may obviously failed attempt to illustrate that there is 
scaling...


/Patric

>
>
>
> On 2020-07-07 13:17, Patric Hedlin wrote:
>> Dear all,
>>
>> I would like to ask for help to review the following change/update:
>>
>> Issue:  https://bugs.openjdk.java.net/browse/JDK-8247766
>> Webrev: http://cr.openjdk.java.net/~phedlin/tr8247766/
>>
>>
>> C1 code generation for reading and writing stack-slots does not 
>> handle large immediate offsets on aarch64. This patch will ensure 
>> that immediate offsets are admissible for base+(immediate)offset 
>> encoding or, if this is not the case, will enforce an explicit 
>> address calculation to a scratch register. (Also correcting a small 
>> glitch in 9-bit signed immediate encoding check.)
>>
>> NOTE: Current patch includes (local) definitions of is_simm/9 and 
>> is_uimm/12, for review purpose only. With JDK-8248901 these will move 
>> to Assembler, and will not be included in the change-set.
>>
>>
>> Testing: tier1-3,6
>>
>>
>> Best regards,
>> Patric 


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