RFR: 8255949: AArch64: Add support for vectorized shift right and accumulate

[Andrew Haley]

On 09/11/2020 12:40, dongbo (E) wrote:
> BTW, the Base64.encode intrinsic we discussed few days ago has not been 
> approved neither.
> 
> Is there any further consideration for that?
> 
> Base64.encode PR link: https://git.openjdk.java.net/jdk/pull/992

Yes, there was one minor style thing:

    Register doff  = c_rarg4;  // position for writing to dest array
    Register isURL = c_rarg5;  // Base64 or URL chracter set

    Register codec  = r6;
    Register length = r7;

I guess the change in naming style here is because isURL really is an
argument, but code and length are temps, but this expects the reader
to be aware that r6 == c_rarg6 and r7 == c_rarg7. I just find the change
in register naming style confusing.

Otherwise it's all perfectly fine.

-- 
Andrew Haley  (he/him)
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
https://keybase.io/andrewhaley
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