RFR: 8256436: AArch64: Fix undefined behavior for signed right shift in assembler

[Xiaohong Gong]

On Fri, 20 Nov 2020 10:44:02 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> Hi @theRealAph , thanks for looking at this PR, and thanks for your comment here. Yes, I agree that the compilers we know like GCC/LLVM can make sure the behavior is defined on AArch64. And actually we didn't met any issues here. However, I'm not quite sure whether other compilers can guarantee it. This is just used to avoid the undefined behavior in future.  So do you think we need to fix it here? I can abandon this patch if this is not valuable. Thanks!
>
> The compilers do guarantee it. Here's GCC, for example:
> 
> 4.5 Integers
> 
> GCC supports only two’s complement integer types, and all bit patterns are ordinary values. 
> 
> Bitwise operators act on the representation of the value including both the sign and value bits, where the sign bit is considered immediately above the highest-value value bit. Signed ‘>>’ acts on negative numbers by sign extension.

Thanks a lot for the explanation. I will close this PR as it is no need to modify it.

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PR: https://git.openjdk.java.net/jdk/pull/1307