RFR: 8262916: Merge LShiftCntV and RShiftCntV into a single node

[Vladimir Ivanov]

On Thu, 8 Apr 2021 11:04:49 GMT, Vladimir Ivanov <vlivanov at openjdk.org> wrote:

>> You should be able to do this without introducing a new node type.  You could change the shift rules to match a vector register like x86.ad and aarch64_sve.ad already do.
>
>> You should be able to do this without introducing a new node type. You could change the shift rules to match a vector register like x86.ad and aarch64_sve.ad already do.
> 
> Not sure what you refer to in x86.ad: vector shifts with variable scalar count require the scalar to be placed in XMM register. `ShiftCntV` handles register-to-register move between different register classes (`RegI` and `Vec*`). 
> 
> Do you suggest reusing some existing vector node (like `Replicate`) to covert the scalar index to vector first? It would have slightly different behavior on x86.

Regarding the proposed change itself (`LShiftCntV/RShiftCntV => ShiftCntV`).

Not sure how important it is, but it has an unfortunate change in generated code for right vector shifts on AArch32: instead of sharing the result of index negation at all use sites, negation is performed at every use site now. 

As a consequence, in an auto-vectorized loop it will lead to:
- 1 instruction per loop iteration (multiplied by unrolling factor);
- no way to hoist the negation of loop invariant index.

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PR: https://git.openjdk.java.net/jdk/pull/3371