RFR: 8257137: Revise smov and umov in aarch64 assembler [v3]

[Hao Sun]

> 1. Both smov and umov lack of checking the register type validity.
>    Register type must be 'B', 'H' or 'S' for smov [1].
>    Register type can NOT be 'Q' for umov [2].
>    Such checks are added.
> 
> 2. smov and umov have different explanations on 'Q' field, i.e. bit 30
> of the insturction, but current assembler implementation mixed it up.
>    For umov, 'Q' field can only be set when register type 'D' is given
>    [2]. However, this field of smov must be set for register type 'S'
>    [1], that is, 'Q' field can be optional for register type 'B' or 'H'.
> 
>    Current implementation only took the umov scenario into account. As a
>    result, runtime error ILL_ILLOPN would occur if 'smov(Register,
> 		   FloatRegister, S, index)' is used.
> 
>    We put them into two separate functions and make 'Q' field always set
>    for smov. That means 'SMOVX' (64-bit register variant) is generated
>    for all cases since it's compatible with our current usages of 'SMOVW'.
>    Existing usages of smov have been double checked and this patch does
>    not affect them.
> 
> 3. Smoke tests are also added.
> 
> [1]. https://developer.arm.com/docs/ddi0602/f/simd-and-floating-point-instructions-alphabetic-order/smov-signed-move-vector-element-to-general-purpose-register
> [2]. https://developer.arm.com/docs/ddi0602/f/simd-and-floating-point-instructions-alphabetic-order/umov-unsigned-move-vector-element-to-general-purpose-register
> 
> 
> Note that Jtreg tier1 and jdk::tier3 have been tested and all tests passed without new failures.

Hao Sun has updated the pull request with a new target base due to a merge or a rebase. The pull request now contains three commits:

 - Merge branch 'master' into smov
   
   Temporally keep file test/hotspot/gtest/aarch64/asmtest.out.h same with
   branch mastger.
 - Update the copyright notice to 2021
   
   Update the copyright notice to 2021.
   
   Change-Id: I7fe485e768ccac45a4861cd3c061aedc13fef579
   CustomizedGitHooks: yes
 - 8257137: Revise smov and umov in aarch64 assembler.
   
   1. Both smov and umov lack of checking the register type validity.
      Register type must be 'B', 'H' or 'S' for smov [1].
      Register type can NOT be 'Q' for umov [2].
      Such checks are added.
   
   2. smov and umov have different explanations on 'Q' field, i.e. bit 30
   of the insturction, but current assembler implementation mixed it up.
      For umov, 'Q' field can only be set when register type 'D' is given
      [2]. However, this field of smov must be set for register type 'S'
      [1], that is, 'Q' field can be optional for register type 'B' or 'H'.
   
      Current implementation only took the umov scenario into account. As a
      result, runtime error ILL_ILLOPN would occur if 'smov(Register,
   		   FloatRegister, S, index)' is used.
   
      We put them into two separate functions and make 'Q' field always set
      for smov. That means 'SMOVX' (64-bit register variant) is generated
      for all cases since it's compatible with our current usages of 'SMOVW'.
      Existing usages of smov have been double checked and this patch does
      not affect them.
   
   3. Smoke tests are also added.
   
   [1]. https://developer.arm.com/docs/ddi0602/f/simd-and-floating-point-instructions-alphabetic-order/smov-signed-move-vector-element-to-general-purpose-register
   [2]. https://developer.arm.com/docs/ddi0602/f/simd-and-floating-point-instructions-alphabetic-order/umov-unsigned-move-vector-element-to-general-purpose-register

-------------

Changes: https://git.openjdk.java.net/jdk/pull/1586/files
 Webrev: https://webrevs.openjdk.java.net/?repo=jdk&pr=1586&range=02
  Stats: 29 lines in 3 files changed: 18 ins; 0 del; 11 mod
  Patch: https://git.openjdk.java.net/jdk/pull/1586.diff
  Fetch: git fetch https://git.openjdk.java.net/jdk pull/1586/head:pull/1586

PR: https://git.openjdk.java.net/jdk/pull/1586