[jdk17] RFR: 8269878: Handle redundant reg-2-reg moves in X86 backend

[Jatin Bhateja]

Chain patterns which connects various legacy,  VL  and non-legacy USE - DEF operands during selection need not emit a reg-2-reg move instruction. C2 register allocator can handle these cases by back propagating the register mask from USE to DEF e.g.

-  USE (regD) <-  DEF( legRegD)  : Not an issue since regD can accommodate ranges allocated to legRegD.

- USE (legRegD) <- USE (regD)   : Not an issue since Allocator will back propagate legRegD mask from USE to its DEF node, which will constrain the allocation set to lower register bank.

Same logic applies to vlRegD , rRegD, legRegD combinations. 

These machine nodes are redundant post selection and can be removed during generic operand resolution phase.

-------------

Commit messages:
 - 8269878: Handle redundant reg-2-reg moves in X86 backend

Changes: https://git.openjdk.java.net/jdk17/pull/217/files
 Webrev: https://webrevs.openjdk.java.net/?repo=jdk17&pr=217&range=00
  Issue: https://bugs.openjdk.java.net/browse/JDK-8269878
  Stats: 342 lines in 9 files changed: 172 ins; 161 del; 9 mod
  Patch: https://git.openjdk.java.net/jdk17/pull/217.diff
  Fetch: git fetch https://git.openjdk.java.net/jdk17 pull/217/head:pull/217

PR: https://git.openjdk.java.net/jdk17/pull/217