RFR: 8269878: Handle redundant reg-2-reg moves in X86 backend [v2]

[Jatin Bhateja]

> Chain patterns which connects various legacy, VL and non-legacy USE - DEF operands during selection need not emit a reg-2-reg move instruction. C2 register allocator can handle these cases by back propagating the register mask from USE to DEF e.g.
> 
> USE (regD) <- DEF( legRegD) : Not an issue since regD can accommodate ranges allocated to legRegD.
> 
> USE (legRegD) <- USE (regD) : Not an issue since Allocator will back propagate legRegD mask from USE to its DEF node, which will constrain the allocation set to lower register bank.
> 
> Same logic applies to vlRegD , rRegD, legRegD combinations.
> 
> These machine nodes are redundant post selection and can be removed during generic operand resolution phase.

Jatin Bhateja has updated the pull request incrementally with one additional commit since the last revision:

  8269878: Review comments resolution.

-------------

Changes:
  - all: https://git.openjdk.java.net/jdk/pull/4693/files
  - new: https://git.openjdk.java.net/jdk/pull/4693/files/62275736..4e1f4d31

Webrevs:
 - full: https://webrevs.openjdk.java.net/?repo=jdk&pr=4693&range=01
 - incr: https://webrevs.openjdk.java.net/?repo=jdk&pr=4693&range=00-01

  Stats: 2 lines in 2 files changed: 0 ins; 0 del; 2 mod
  Patch: https://git.openjdk.java.net/jdk/pull/4693.diff
  Fetch: git fetch https://git.openjdk.java.net/jdk pull/4693/head:pull/4693

PR: https://git.openjdk.java.net/jdk/pull/4693