RFR: 8267356: AArch64: Vector API SVE codegen support

[Paul Sandoz]

Either way I think it's good that changes are/were socialized early, so as reviewers may familiarize themselves and not be surprised. Leaving a PR open for comments is useful in this respect.

I’ll start pushing the JEP forward this week.

Paul.

> On Jul 18, 2021, at 7:47 PM, Ningsheng Jian <njian at openjdk.java.net> wrote:
> 
> On Thu, 20 May 2021 07:32:52 GMT, Ningsheng Jian <njian at openjdk.org> wrote:
> 
>> This is the integration of current SVE work done in panama-vector/vectorIntrinscs, which includes:
>> 
>> 1. Code generation for Vector API c2 IR nodes with SVE.
>> 2. Non-max vector size support with SVE, e.g. using *128Vector (and *64Vector) APIs on 256-bit SVE environment could also generate optimized SVE instructions with predicate feature.
>> 3. Some more SVE assemblers (and tests) used by the codegen part.
>> 
>> Test: tier1-3 with vector api test cases passed on 512-bit SVE hardware with MaxVectorSize=16/32/64.
>> 
>> Note: our original plan was making this work part of JEP 414 Vector API (Second Incubator) [1], but we realized that it's now close to 17 release cycle and the JEP process may take time. Adding more features could delay the whole review process for the JEP. So we separate this work out as a standalone patch.
>> 
>> [1] http://openjdk.java.net/jeps/414
> 
> Will reopen this when https://bugs.openjdk.java.net/browse/JDK-8269306 finalized.
> 
> -------------
> 
> PR: https://git.openjdk.java.net/jdk/pull/4122