RFR: 8267356: AArch64: Vector API SVE codegen support [v2]

Ningsheng Jian njian at openjdk.java.net
Mon Jul 26 09:23:19 UTC 2021


On Mon, 26 Jul 2021 04:56:38 GMT, Ningsheng Jian <njian at openjdk.org> wrote:

>> This is the integration of current SVE work done in panama-vector/vectorIntrinscs, which includes:
>> 
>> 1. Code generation for Vector API c2 IR nodes with SVE.
>> 2. Non-max vector size support with SVE, e.g. using *128Vector (and *64Vector) APIs on 256-bit SVE environment could also generate optimized SVE instructions with predicate feature.
>> 3. Some more SVE assemblers (and tests) used by the codegen part.
>> 
>> Note: VectorMask<E\> is still represented in vector register, a further improvement to map mask to predicate register is under development at https://github.com/openjdk/panama-vector/tree/vectorIntrinsics+mask
>> 
>> 
>> Test: tier1-3 with vector api test cases passed on 512-bit SVE hardware with MaxVectorSize=16/32/64.
>
> Ningsheng Jian has updated the pull request with a new target base due to a merge or a rebase. The pull request now contains one commit:
> 
>   8267356: AArch64: Vector API SVE codegen support
>   
>   This is the integration of current SVE work done in
>   panama-vector/vectorIntrinscs, which includes:
>   
>   1. Code generation for Vector API c2 IR nodes with SVE.
>   2. Non-max vector size support with SVE, e.g. using *128Vector APIs on
>      256-bit SVE environment could also generate optimized SVE
>      instructions with predicate feature.
>   3. Some more SVE assemblers (and tests) used by the codegen part.
>   
>   Note: VectorMask<E> is still represented in vector register, a further
>   improvement to map mask to predicate register is under development at
>   https://github.com/openjdk/panama-vector/tree/vectorIntrinsics+mask
>   
>   Test: tier1-3 with vector api test cases passed on 512-bit SVE hardware
>   with MaxVectorSize=16/32/64.

> Basically looks good.
> One small thing: please check all comments in the Assembler to make sure they match the named instruction groupsl in DDI0584B_a_SVE/SVE_xml/xhtml/encodingindex.html. I know that Arm aren't consistent in their docs either, but we don't need to add to the confusion.

Thank you for the review, Andrew! I will revisit all the assembler comments to make them clear.

-------------

PR: https://git.openjdk.java.net/jdk/pull/4122


More information about the hotspot-compiler-dev mailing list