RFR: 8267663: [vector] Add unsigned comparison operators on AArch64 [v2]

[Eric Liu]

On Mon, 7 Jun 2021 10:06:05 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> Eric Liu has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Refactor code
>>   
>>   - public elemBytes_to_Arrangement and make it more generalized since it
>>     maybe useful in the future.
>>   - move neon_compare into macroAssembler.
>>   
>>   Change-Id: I7596de03abb066574cf430d935edd07cd627e14b
>
> src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp line 5348:
> 
>> 5346:     case 2:
>> 5347:       return isQ ? Assembler::T8H : Assembler::T4H;
>> 5348:     case 4:
> 
> This should be
> 
> `
>       return isQ ? T8H : T4H;
> `
> but isn't this just a table lookup?
> 
> 
> if (in_range)
>     return elemBytes_to_Arrangement_table[esize][isQ]
> 
> Why not?

Thanks. The table is done.

> src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp line 5373:
> 
>> 5371:       case BoolTest::gt: fcmgt(dst, size, src1, src2); break;
>> 5372:       case BoolTest::le: fcmge(dst, size, src2, src1); break;
>> 5373:       case BoolTest::lt: fcmgt(dst, size, src2, src1); break;
> 
> Are you sure about these two lines?

As A64-SIMD doesn't have `fcmlt(register)` and `fcmle(register)` instructions, I think it's okay to use `fcmgt` and `fcmge` with reversing the argument. But I can't locate the initial patch adding them.

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PR: https://git.openjdk.java.net/jdk/pull/4358