RFR: 8262355: Support for AVX-512 opmask register allocation. [v4]

[Vladimir Ivanov]

On Wed, 10 Mar 2021 15:44:10 GMT, Jatin Bhateja <jbhateja at openjdk.org> wrote:

>> src/hotspot/cpu/x86/vmreg_x86.cpp line 75:
>> 
>>> 73: #define STACK_TYPE 3
>>> 74: 
>>> 75: //TODO: Case for KRegisters
>> 
>> Please, elaborate what is missing and how the missing code manifests at runtime.
>
> Would seek your suggestion here. Can it wait for base patch

So, it's used exclusively by Foreign ABI implementation which doesn't support k-registers on x86 now.
I'm fine with leaving it as is for now.

>> src/hotspot/share/opto/matcher.cpp line 995:
>> 
>>> 993:     idealreg2regmask[Op_RegVMask] = regmask_for_ideal_register(Op_RegVMask, ret);
>>> 994:   } else {
>>> 995:     idealreg2regmask[Op_RegVMask] = idealreg2regmask[Op_RegI];
>> 
>> How `idealreg2regmask[Op_RegVMask]` is used when `Matcher::has_predicated_vectors() == false`?
>
>> How `idealreg2regmask[Op_RegVMask]` is used when `Matcher::has_predicated_vectors() == false`?
> 
> No new register pressure threshold has been introduced for predicate registers, hence just a default initialization for targets which do not support them, since its getting used in raise/lower_pressure

Why not simply unconditionally initialize `idealreg2regmask[Op_RegVMask]` to `regmask_for_ideal_register(Op_RegVMask, ret)` then? `rm` should never overlap with `regmask_for_ideal_register(Op_RegVMask, ret)` in `raise`/`lower_pressure` when `Matcher::has_predicated_vectors() == false`.

PS: you could also put `Matcher::has_predicated_vectors()` in `raise`/`lower_pressure` for `r.overlap(*Matcher::idealreg2regmask[Op_RegVMask])` check. Or even factor the whole condition out into a helper method.

>> src/hotspot/cpu/x86/register_x86.hpp line 260:
>> 
>>> 258: 
>>> 259:     number_of_registers = RegisterImpl::number_of_registers * RegisterImpl::max_slots_per_register +
>>> 260:       2 * FloatRegisterImpl::number_of_registers + NOT_LP64(8) LP64_ONLY(0) +
>> 
>> Can you elaborate, please, why 8 more slots are needed on x86_32?
>
> This is to cover for additional FILL0-7 definitions present only for 32 bit JVM

Hm, still not clear to me why it matters only now. 
Is it because predicate registers are put at the very end and the wrong sizing leaves them out of the RegMask bit map on x86-32?

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PR: https://git.openjdk.java.net/jdk/pull/2768