RFR: 8262355: Support for AVX-512 opmask register allocation. [v8]

[Vladimir Ivanov]

On Tue, 16 Mar 2021 19:24:10 GMT, Jatin Bhateja <jbhateja at openjdk.org> wrote:

>> src/hotspot/cpu/x86/x86.ad line 2623:
>> 
>>> 2621: // =================================EVEX special===============================
>>> 2622: 
>>> 2623: instruct setMask(rRegI dst, rRegI src, kReg_K1 mask) %{
>> 
>> Why can't other instructions destroy `k1` by getting `k1` assigned as a temp? Currenlty, `kReg` includes the whole range of k-registers (k0-k7).
>
> I think post-loop vectorization handling currently expects mask to be present in K1, I just pulled it out till the instruction level,  RA allocates opmask registers in reverse order i.e. K7-K1, thus temps should all be allocated K7 registers first.

It is just a coincidence. Considering there's a way to produce an arbitrary number of predicates using `VectorMask`, I'd prefer to see a more robust solution that won't cause us problems in the future.
Please, exclude `k1` from `kReg` then.

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PR: https://git.openjdk.java.net/jdk/pull/2768