RFR: 8262355: Support for AVX-512 opmask register allocation. [v3]

[Jatin Bhateja]

On Mon, 29 Mar 2021 07:49:09 GMT, Xiaohong Gong <xgong at openjdk.org> wrote:

>> Hi, bitwise operation involving VectorMask nodes (i.e. the nodes with type TypeVectMask) works over predicate registers. Since for x86 opmask register representation is consistent for all primitive types, it may not be a problem. For SVE a different instruction pattern for masks of floating types may suffice.  Yes, we can do refinements in subsequent patches.
>
> OK, thanks! Another consideration is: since mask type representations are different for platforms that do not have mask features (using TypeVect), and SVE/AVX-512 (using TypeVectMask). And this special handling is needed for both platforms/types. Is it possible to use one type (i.e. TypeVectMask) for all mask types, with different `idea_reg()` for different platforms (like what you did in your original patch) ? Or did you have considered this solution before? Same with above, we can also refine this in future if it's possible.

Hi @XiaohongGong , this base patch is purely to extend allocation support without modifying existing vector API mask nodes behavior. We can do that discussion on panama-dev to reach to a final solution which covers both SVE and AVX512 masking operations.

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PR: https://git.openjdk.java.net/jdk/pull/2768