RFR: 8276108: Wrong instruction generation in aarch64 backend [v2]

[Patric Hedlin]

On Wed, 24 Nov 2021 11:52:45 GMT, Patric Hedlin <phedlin at openjdk.org> wrote:

>> C1 code generation on AArch64 may produce bad LDR/STR immediate offset instructions when the actual operand (datum) size is unknown. This change will alter the code generated for the problematic immediate offset to use the register offset version (requiring additional instructions).
>> 
>> Contributed by Nick Gasson.
>> 
>> Added assert in Address::encode() to emphasise the use of a valid immediate (in base_plus_offset).
>> 
>> Added clarifying comment to Address::offset_ok_for_immed() emphasising favouring of the scaled unsigned 12-bit encoding for aligned offsets.
>
> Patric Hedlin has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Clean-up address calculation via use of legitimize_address().

As suspected, there are issues around initialisation as well as direct use of immediate offsets with scaling. I have filed the following TR: https://bugs.openjdk.java.net/browse/JDK-8277862, to track the issue.

I'm letting this change stand as is.

-------------

PR: https://git.openjdk.java.net/jdk/pull/6212