Integrated: 8276108: Wrong instruction generation in aarch64 backend

[Patric Hedlin]

On Tue, 2 Nov 2021 14:02:48 GMT, Patric Hedlin <phedlin at openjdk.org> wrote:

> C1 code generation on AArch64 may produce bad LDR/STR immediate offset instructions when the actual operand (datum) size is unknown. This change will alter the code generated for the problematic immediate offset to use the register offset version (requiring additional instructions).
> 
> Contributed by Nick Gasson.
> 
> Added assert in Address::encode() to emphasise the use of a valid immediate (in base_plus_offset).
> 
> Added clarifying comment to Address::offset_ok_for_immed() emphasising favouring of the scaled unsigned 12-bit encoding for aligned offsets.

This pull request has now been integrated.

Changeset: 72bacf8d
Author:    Patric Hedlin <phedlin at openjdk.org>
URL:       https://git.openjdk.java.net/jdk/commit/72bacf8d256071773d8fd9f9c2d0aebb2cb32dea
Stats:     26 lines in 3 files changed: 8 ins; 2 del; 16 mod

8276108: Wrong instruction generation in aarch64 backend

Co-authored-by: Nick Gasson <ngasson at openjdk.org>
Reviewed-by: aph, neliasso

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PR: https://git.openjdk.java.net/jdk/pull/6212