Integrated: 8267356: AArch64: Vector API SVE codegen support

[Ningsheng Jian]

On Thu, 20 May 2021 07:32:52 GMT, Ningsheng Jian <njian at openjdk.org> wrote:

> This is the integration of current SVE work done in panama-vector/vectorIntrinscs, which includes:
> 
> 1. Code generation for Vector API c2 IR nodes with SVE.
> 2. Non-max vector size support with SVE, e.g. using *128Vector (and *64Vector) APIs on 256-bit SVE environment could also generate optimized SVE instructions with predicate feature.
> 3. Some more SVE assemblers (and tests) used by the codegen part.
> 
> Note: VectorMask<E\> is still represented in vector register, a further improvement to map mask to predicate register is under development at https://github.com/openjdk/panama-vector/tree/vectorIntrinsics+mask
> 
> 
> Test: tier1-3 with vector api test cases passed on 512-bit SVE hardware with MaxVectorSize=16/32/64.

This pull request has now been integrated.

Changeset: 9d3379b9
Author:    Ningsheng Jian <njian at openjdk.org>
URL:       https://git.openjdk.java.net/jdk/commit/9d3379b9755e9739f0b8f5c29deb1d28d0f3aa81
Stats:     5761 lines in 13 files changed: 4576 ins; 195 del; 990 mod

8267356: AArch64: Vector API SVE codegen support

Co-authored-by: Xiaohong Gong <xgong at openjdk.org>
Co-authored-by: Wang Huang <whuang at openjdk.org>
Co-authored-by: Ningsheng Jian <njian at openjdk.org>
Co-authored-by: Xuejin He <xhe at openjdk.org>
Co-authored-by: Ai Jiaming <aijiaming1 at huawei.com>
Co-authored-by: Eric Liu <eliu at openjdk.org>
Reviewed-by: aph, ngasson

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PR: https://git.openjdk.java.net/jdk/pull/4122