RFR: 8280511: AArch64: Combine shift and negate to a single instruction

[Fei Gao]

Hi,

In AArch64,

asr     x10, x1, #31
neg     x0, x10

can be optimized to:
`neg    x0, x1, asr #31`

To implement the instruction combining, we add matching rules in the backend.

Thanks.

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Commit messages:
 - 8280511: AArch64: Combine shift and negate to a single instruction

Changes: https://git.openjdk.java.net/jdk/pull/7471/files
 Webrev: https://webrevs.openjdk.java.net/?repo=jdk&pr=7471&range=00
  Issue: https://bugs.openjdk.java.net/browse/JDK-8280511
  Stats: 259 lines in 3 files changed: 257 ins; 0 del; 2 mod
  Patch: https://git.openjdk.java.net/jdk/pull/7471.diff
  Fetch: git fetch https://git.openjdk.java.net/jdk pull/7471/head:pull/7471

PR: https://git.openjdk.java.net/jdk/pull/7471