RFR: 8287835: Add support for additional float/double to integral conversion for x86 [v5]

Sandhya Viswanathan sviswanathan at openjdk.java.net
Wed Jun 8 16:38:45 UTC 2022


On Wed, 8 Jun 2022 12:47:37 GMT, Jatin Bhateja <jbhateja at openjdk.org> wrote:

>> Sandhya Viswanathan has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Fix extra space
>
> src/hotspot/cpu/x86/x86.ad line 7349:
> 
>> 7347:         assert(to_elem_bt == T_BYTE, "required");
>> 7348:         __ evpmovdb($dst$$XMMRegister, $dst$$XMMRegister, vlen_enc);
>> 7349:       }
> 
> We do support F2I cast on AVX2 and that can be extended for sub-word types using 
> signed saturated lane packing instructions (PACKSSDW and PACKSSWB).

I will file a separate RFE for this.

> src/hotspot/cpu/x86/x86.ad line 7388:
> 
>> 7386:         case T_BYTE:
>> 7387:           __ evpmovsqd($dst$$XMMRegister, $dst$$XMMRegister, vlen_enc);
>> 7388:           __ evpmovdb($dst$$XMMRegister, $dst$$XMMRegister, vlen_enc);
> 
> Sub-word handling can be extended for AVX2 using packing instruction sequence similar to VectorStoreMask for quad ward lanes.

D2X in general needs AVX 512 due to evcvttpd2qq.

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PR: https://git.openjdk.java.net/jdk/pull/9032


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