RFR: 8287835: Add support for additional float/double to integral conversion for x86 [v5]

[Jatin Bhateja]

On Wed, 8 Jun 2022 16:28:54 GMT, Sandhya Viswanathan <sviswanathan at openjdk.org> wrote:

>> src/hotspot/cpu/x86/x86.ad line 7388:
>> 
>>> 7386:         case T_BYTE:
>>> 7387:           __ evpmovsqd($dst$$XMMRegister, $dst$$XMMRegister, vlen_enc);
>>> 7388:           __ evpmovdb($dst$$XMMRegister, $dst$$XMMRegister, vlen_enc);
>> 
>> Sub-word handling can be extended for AVX2 using packing instruction sequence similar to VectorStoreMask for quad ward lanes.
>
> D2X in general needs AVX 512 due to evcvttpd2qq.

Thanks @sviswa7 , for AVX we can use VCVTTPD2DQ to cast double precison lane to integer and subsequently to sub  words lanes. For casting to long we  do not have direct instruction.

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PR: https://git.openjdk.org/jdk/pull/9032