RFR: 8288300: AArch64: Remove the assertion in fmovs/fmovd(FloatRegister, FloatRegister)

[Andrew Haley]

On Wed, 15 Jun 2022 04:07:47 GMT, Hao Sun <haosun at openjdk.org> wrote:

> The assertion, i.e. src and dst must be different registers, was
> introduced years ago. But I don't think it's needed.
> 
> This limitation was added in [1]. Frankly speaking, I don't know the
> reason. But I guess the assertion is probably used for debugging,
> raising one warning of fmovs/fmovd usage in the scenario of moving
> element at index zero from one **vector** register, to one float-point
> scalar register. If the "src" vector register and the "dst" float-point
> scalar register are the same one, it introduces a side-effect, i.e. the
> higher bits are cleared to zeros[2].
> 
> If so, I argue that
> 1) the assembler should align with the ISA.
> 2) compiler developers should be aware of the side-effect when they want
> to use fmovs/fmovd, and they should guarantee "dst != src" if they like
> to higher bits untouched, e.g., [3].
> 
> Hence, I think we can remove this unnecessary assertion.
> 
> [1] http://hg.openjdk.java.net/aarch64-port/jdk8/hotspot/rev/9baee4e65ac5
> [2] https://developer.arm.com/documentation/ddi0596/2021-12/SIMD-FP-Instructions/FMOV--register---Floating-point-Move-register-without-conversion-?lang=en
> [3] https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/aarch64/aarch64_sve.ad#L4899

I don't remember, but I suspect that such moves are probably a sign that there is a bug elsewhere in the port, perhaps a misnamed register or a buggy compiler. I think the assertions are no more than a warning to the developer that something may be wrong elsewhere.
I am happy for the assertions to be removed. As you say, there is no such architectural restriction that requires them.

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PR: https://git.openjdk.org/jdk/pull/9163