RFR: 8288467: remove memory_operand assert for spilled instructions

[Tobias Hartmann]

On Fri, 17 Jun 2022 09:32:40 GMT, Emanuel Peter <epeter at openjdk.org> wrote:

> In [JDK-8282555](https://bugs.openjdk.org/browse/JDK-8282555) I added this assert, because on x64 this seems to always hold. But it turns out there are instructions on x86 (32bit) that violate this assumption.
> 
> **Why it holds on x64**
> It seems we only ever do one read or one write per instruction. Instructions with multiple memory operands are extremely rare.
> 1. we spill from register to memory: we land in the if case, where the cisc node has an additional input slot for the memory edge.
> 2. we spill from register to stackSlot: no additional input slot is reserved, we land in else case and add an additional precedence edge.
> 
> **Why it is violated on x86 (32bit)**
> We have additional cases that land in the else case. For example spilling `src1` from `addFPR24_reg_mem` to `addFPR24_mem_cisc`.
> https://urldefense.com/v3/__https://github.com/openjdk/jdk19/blob/53bf1bfdabb79b37afedd09051d057f9eea620f2/src/hotspot/cpu/x86/x86_32.ad*L10325-L10327__;Iw!!ACWV5N9M2RV99hQ!KP0-SKIjsleD5vwpg0AuGgQV7lopMaKXRcDbI06X2m1H5WDyhgY5RE8x5KQ0ZkTokSLHg5mWjq-N1YW1QVvPhzYBTgbHrSvQog$  https://urldefense.com/v3/__https://github.com/openjdk/jdk19/blob/53bf1bfdabb79b37afedd09051d057f9eea620f2/src/hotspot/cpu/x86/x86_32.ad*L10368-L10370__;Iw!!ACWV5N9M2RV99hQ!KP0-SKIjsleD5vwpg0AuGgQV7lopMaKXRcDbI06X2m1H5WDyhgY5RE8x5KQ0ZkTokSLHg5mWjq-N1YW1QVvPhzYBTgardIcWcQ$ 
> We land in the else case, because both have 2 inputs, thus `oper_input_base() == 2`.
> And both have memory operands, so the assert must fail.
> 
> **Solutions**
> 1. Remove the Assert, as it is incorrect.
> 2. Extend the assert to be correct.
>    - case 1: reg to mem spill, where we have a reserved input slot in cisc for memory edge
>    - case 2: reg to stackSlot spill, where both mach and cisc have no memory operand.
>    - other cases, with various register, stackSlot and memory inputs and outputs. We would have to find a general rule, and test it properly, which is not trivial because getting registers to spill is not easy to precisely provoke.
> 3. Have platform dependent asserts. But also this makes testing harder.
> 
> For now I went with 1. as it is simple and as far as I can see correct.
> 
> Running tests on x64 (should not fail). **I need someone to help me with testing x86 (32bit)**. I only verified the reported test failure with a 32bit build.

Looks reasonable to me. It would be good if @jatin-bhateja could also have a look.

src/hotspot/share/opto/chaitin.cpp line 1740:

> 1738:             // operands, before and after spilling.
> 1739:             // (e.g. spilling "addFPR24_reg_mem" to "addFPR24_mem_cisc")
> 1740:             // In eigher case, there is no space in the inputs for the memory edge

Suggestion:

            // In either case, there is no space in the inputs for the memory edge

-------------

Marked as reviewed by thartmann (Reviewer).

PR: https://git.openjdk.org/jdk19/pull/33