RFR: 8296168: x86: Add reasonable constraints between AVX and SSE

[Vladimir Ivanov]

On Wed, 2 Nov 2022 17:00:30 GMT, Vladimir Kozlov <kvn at openjdk.org> wrote:

>> We've not seen any x86 CPU, Intel or otherwise, where AVX features are available but SSE 4.1 is not supported. This patch suggests constraining setup so that any explicit value of UseSSE less than 4 (the default on any AVX-supporting CPU) implicitly disables AVX. This simplifies ergonomics and reduces the testing surface. Concretely this would allow #10847 to not have to guard the new intrinsic on UseSSE level to avoid some surprising test failures in tests verifying SSE-enabled intrinsics.
>> 
>> I've rearranged the initialization of UseAVX and UseSSE to allow AVX to look at the post-ergo values of UseSSE.
>> 
>> Testing: tier1-tier3, manual verification
>
> src/hotspot/cpu/x86/vm_version_x86.cpp line 1041:
> 
>> 1039:         }
>> 1040:       } else {
>> 1041:         if (UseSSE > 3) {
> 
> We need  an other RFE to clean this up. We should disable CPU features according UseSSE value as we already do for UseAVX.
> For these changes this is fine.

It's already the case for `UseSSE`:
https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/x86/vm_version_x86.cpp#L858

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PR: https://git.openjdk.org/jdk/pull/10946