RFR: 8297549: RISC-V: Add support for Vector API vector load const operation

[Dingli Zhang]

On Fri, 25 Nov 2022 10:21:42 GMT, Vladimir Kempik <vkempik at openjdk.org> wrote:

> Can you also run whole tier2 please ?

Thank you for your suggestion, of course! I will add the results of whole tier2 later.

> src/hotspot/cpu/riscv/riscv_v.ad line 2088:
> 
>> 2086:     BasicType bt = Matcher::vector_element_basic_type(this);
>> 2087:     Assembler::SEW sew = Assembler::elemtype_to_sew(bt);
>> 2088:     __ vsetvli(t0, x0, sew);
> 
> I heard this opcode ( vsetvli) is pretty costly when the params of vector engine gets reconfigured ( for example for different element width). Not saying anything bad here. We might need to think about some optimisations for using vsetvli in future

Hi @VladimirKempik , thanks for the review! Almost every instruct in `riscv_v.ad ` uses this opcode ( vsetvli)  at the beginning, and it does look like there is a need for optimization. Maybe we can probably discuss it more extensively and change it uniformly.

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PR: https://git.openjdk.org/jdk/pull/11344