RFR: 8305543: Ensure GC barriers for arraycopy on AArch64 use caller saved neon temp registers

[Erik Österlund]

The arraycopy stubs on AArch64 now allows the GC to vectorize arraycopy barriers. That's great! But the gct3 registers we hand to the GC is v8 today, which is callee saved (well at least the lower 64 bits). Therefore, if the GC clobbers this temp registers, it can have unexpected side effects on the caller float/double registers. We should use a caller saved register instead. 
This is only used by generational ZGC, so isn't a mainline bug yet. We should fix it before it becomes one.

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Commit messages:
 - 8305543: Ensure GC barriers for arraycopy on AArch64 use caller saved neon temp registers

Changes: https://git.openjdk.org/jdk/pull/13325/files
 Webrev: https://webrevs.openjdk.org/?repo=jdk&pr=13325&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8305543
  Stats: 2 lines in 1 file changed: 0 ins; 0 del; 2 mod
  Patch: https://git.openjdk.org/jdk/pull/13325.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/13325/head:pull/13325

PR: https://git.openjdk.org/jdk/pull/13325