RFR: 8301739: AArch64: Add optimized rules for vector compare with immediate for SVE

[Andrew Haley]

On Tue, 28 Mar 2023 02:06:41 GMT, Chang Peng <duke at openjdk.org> wrote:

> We can use SVE compare-with-integer-immediate instructions like cmpgt(immediate)[1] to avoid the extra scalar2vector operations.
> 
> The following instruction sequence
> 
> 
> movi    v17.16b, #12
> cmpgt   p0.b, p7/z, z16.b, z17.b
> 
> 
> can be optimized to:
> 
> 
> cmpgt   p0.b, p7/z, z16.b, #12
> 
> 
> This patch does the following:
> 1. Add SVE compare-with-7bit-unsigned-immediate instructions to C2's backend.
> SVE cmp<cc>(immediate) instructions can support vector comparing with 7bit unsigned integer immediate (range from 0 to 
> 127)or 5bit signed integer immediate (range from -16 to 15).
> 
> 2. Add optimized match rules to generate the compare-with-immediate instructions.
> 
> [1]: https://developer.arm.com/documentation/ddi0596/2021-12/SVE-Instructions/CMP-cc---immediate---Compare-vector-to-immediate-

src/hotspot/cpu/aarch64/assembler_aarch64.hpp line 3823:

> 3821:     f((cond_op >> 1) & 0x7, 15, 13), pgrf(Pg, 10), rf(Zn, 5);
> 3822:     f(cond_op & 0x1, 4), prf(Pd, 0);
> 3823:   }

This entire block of code needs extensive refactoring.

Please write a function from Condition -> int. Use a simple boolean is_unsigned. Extract the common code from the two arms of this if statement.

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PR Review Comment: https://git.openjdk.org/jdk/pull/13200#discussion_r1162489309