RFR: 8302908: RISC-V: Support masked vector arithmetic instructions for Vector API [v12]

Feilong Jiang fjiang at openjdk.org
Mon Apr 17 07:30:42 UTC 2023


On Thu, 6 Apr 2023 08:50:27 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

>> src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp line 1731:
>> 
>>> 1729:   if (bt == T_FLOAT || bt == T_DOUBLE) {
>>> 1730:     switch (cond) {
>>> 1731:       case BoolTest::eq: vmfeq_vv(vd, src1, src2, vm); break;
>> 
>> `BoolTest::ge` and `BoolTest::gt` are implemented with `BoolTest::le` and `BoolTest::lt` by exchanging the operands, when one of the operands is NAN, will the results of comparisons be wrong?
>
> Thanks for the review!
> 
> I think there may be no problem here. The foating-point compare instructions follow the semantics of the scalar floating-point compare instructions[1] in RVV. For all three instructions (FEQ.S, FLT.S, FLE.S), the result is 0 if either operand is NaN[2]. So when one of the operands is NaN, `BoolTest::ge`, `BoolTest::gt`, `BoolTest::le` and `BoolTest::lt` will all generate a 0 on the corresponding bit. 
> 
> Also a jtreg test case[3] proves that our current logic is fine. `GTFloat512VectorTests` covers the case where the input is Nan. The test will pass properly and generate the following compilation log which contains `vmaskcmp_rvv`:
> 
> 
> 1ac     B20: # out( B49 B21 ) <- in( B48 B19 )  Freq: 4188.06
> 1ac     vmaskcmp_rvv V0, V4, V5, #3
> 1b8     
> 1b8     MEMBAR-store-store #@membar_storestore
> 1bc     # checkcastPP of R11, #@checkCastPP
> 1bc     vstoremask V1, V0
> 1c8     addi  R7, R11, #16 # ptr, #@addP_reg_imm
> 1cc     spill R11 -> [sp, #104] # spill size = 64
> 1ce     storeV [R7], V1 # vector (rvv)
> 1d6     ld  R19, [R23, #264] # ptr, #@loadP
> 1da     ld  R7, [R23, #280] # ptr, #@loadP
> 1de     addi  R28, R19, #16 # ptr, #@addP_reg_imm
> 1e2     bgeu  R28, R7, B49 #@cmpP_branch  P=0.000100 C=-1.000000
> 
> 
> [1] https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#1313-vector-floating-point-compare-instructions
> [2] https://github.com/riscv/riscv-isa-manual/releases/download/draft-20230131-c0b298a/riscv-spec.pdf
> [3] https://github.com/openjdk/jdk/tree/master/test/jdk/jdk/incubator/vector/Float512VectorTests.java

Hi, @DingliZhang, I have the same concern here. As the scalar version of Float-point comparison, we have `is_unordered` flag to return the right result if operands contain NaN(s) [1]. Does vfcmp need this flag too?

1. https://github.com/openjdk/jdk/blob/7f56de8f78c0b54e5cf313f53213102a3495234f/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp#L1010-L1037

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PR Review Comment: https://git.openjdk.org/jdk/pull/12682#discussion_r1168288129


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