RFR: 8312213: Remove unnecessary TEST instructions on x86 when flags reg will already be set [v6]

[Jatin Bhateja]

On Thu, 10 Aug 2023 03:31:48 GMT, Jatin Bhateja <jbhateja at openjdk.org> wrote:

>> Tobias Hotz has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Add a side effect to the IR tests to make sure we do not emit CMOVs there
>>   
>>   Without Tiered Compilation, no profile data is present, which means a CMOV would always be emitted. Keep the compiler from doing that, as the peephole currently does not work with CMOV instructions
>
> src/hotspot/cpu/x86/peephole_x86_64.cpp line 175:
> 
>> 173: // It checks the required EFLAGS for the downstream instructions of the TEST
>> 174: // and removes the TEST if the preceding instructions already sets all these flags
>> 175: bool Peephole::test_may_remove(Block* block, int block_index, PhaseCFG* cfg_, PhaseRegAlloc* ra_,
> 
> FYI, Processor frontend decoders employ macro-fusions techniques to emit single micro operation for  TEST + JMP  patterns and many more, please refer to 3.4.2.2 of [Optimization manual](https://cdrdv2.intel.com/v1/dl/getContent/671488?explicitVersion=true).  So effect of this optimization may not be evident in most general use cases where a JMP succeeds TEST.  This is more of a size oriented optimization where one of the two back to back FLAGS effecting instructions are removed.

I was curious to see impact of this patch on micro fusion.  Sapphire rapids has an explicit event for it and shows 3x drop in number of micro fused operations with attached test, not much impact on performance. 
[micro.txt](https://github.com/openjdk/jdk/files/12312909/micro.txt)
![PR14172](https://github.com/openjdk/jdk/assets/59989778/b51f9df9-a6a8-4dae-aa17-68c4cc2c0f35)

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PR Review Comment: https://git.openjdk.org/jdk/pull/14172#discussion_r1290502246