RFR: 8317721: RISC-V: Implement CRC32 intrinsic [v2]

[ArsenyBochkarev]

On Tue, 12 Dec 2023 09:55:09 GMT, Vladimir Kempik <vkempik at openjdk.org> wrote:

>> ArsenyBochkarev has updated the pull request incrementally with three additional commits since the last revision:
>> 
>>  - Use zero_extend instead of shifts where possible
>>  - Use andn instead of notr + andr where possible
>>  - Replace shNadd with one instruction in most cases
>
> src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 3753:
> 
>> 3751:   mv(tmp5, bits32);
>> 3752:   notr(crc, crc);
>> 3753:   andr(crc, crc, tmp5);
> 
> can use andn(crc, tmp, crc); here, so get some accel when Zbb present

Done

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PR Review Comment: https://git.openjdk.org/jdk/pull/17046#discussion_r1427886298