RFR: 8301371: Interpreter store barriers on x86_64 don't have disjoint temp registers

[Erik Österlund]

On Fri, 3 Feb 2023 09:47:08 GMT, Thomas Schatzl <tschatzl at openjdk.org> wrote:

>> The interpreter store barriers on x86_64 use temp registers that sometimes intersects with registers that are part of the address. Therefore, when clobbering temp registers, the address gets destroyed. This has happened to be okay so far, based on how these registers are used in existing backends, but it doesn't work well for generational ZGC. This CR selects new temp registers that I have verified works for everyone on x86_64.
>
> Marked as reviewed by tschatzl (Reviewer).

Thanks for the review, @tschatzl!

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PR: https://git.openjdk.org/jdk/pull/12309