RFR: 8301371: Interpreter store barriers on x86_64 don't have disjoint temp registers

[Erik Österlund]

The interpreter store barriers on x86_64 use temp registers that sometimes intersects with registers that are part of the address. Therefore, when clobbering temp registers, the address gets destroyed. This has happened to be okay so far, based on how these registers are used in existing backends, but it doesn't work well for generational ZGC. This CR selects new temp registers that I have verified works for everyone on x86_64.

-------------

Commit messages:
 - 8301371: Interpreter store barriers on x86_64 don't have disjoint temp registers

Changes: https://git.openjdk.org/jdk/pull/12309/files
 Webrev: https://webrevs.openjdk.org/?repo=jdk&pr=12309&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8301371
  Stats: 4 lines in 1 file changed: 3 ins; 0 del; 1 mod
  Patch: https://git.openjdk.org/jdk/pull/12309.diff
  Fetch: git fetch https://git.openjdk.org/jdk pull/12309/head:pull/12309

PR: https://git.openjdk.org/jdk/pull/12309