RFR: 8301313: RISC-V: C2: assert(false) failed: bad AD file due to missing match rule

[Fei Yang]

On Mon, 30 Jan 2023 13:57:59 GMT, Feilong Jiang <fjiang at openjdk.org> wrote:

> The RISC-V architecture does not support conditional move instructions or flags register for now. So we set `ConditionalMoveLimit` to 0 for this port to avoid the generation of the CMove node by C2. But turns out this could not avoid all CMove nodes generation: some CMove generations are not guarded by this parameter. Therefore, we still added several match rules in AD file for CMove nodes like `CMoveI_CmpI`/`CMoveL_CmpL` etc. to cover those scenarios:
> 
> https://github.com/openjdk/jdk/blob/ebb84ad70d3295d9a429904fcdacdb8ecd1bf434/src/hotspot/cpu/riscv/riscv.ad#L9994-L10096
> 
> In this case, we observed that CMoveL was generated in `PhaseIdealLoop::transform_long_range_checks`,  which could match exactly with `cmoveL_cmpL`:
> https://github.com/openjdk/jdk/blob/ebb84ad70d3295d9a429904fcdacdb8ecd1bf434/src/hotspot/share/opto/loopnode.cpp#L1344-L1351
> 
> But `PhaseIdealLoop::optimize` after `PhaseIdealLoop::transform_long_range_checks` may replace CmpLNode with CmpINode in `CmpLNode::Ideal`:
> https://github.com/openjdk/jdk/blob/ebb84ad70d3295d9a429904fcdacdb8ecd1bf434/src/hotspot/share/opto/subnode.cpp#L877-L886
> 
> In riscv.ad, there is no match rule for CMoveL and CmpI, which result in the bad AD file.
> 
> With this fix, we should be able to cover all other CMove scenarios not guarded by `ConditionalMoveLimit`.
> 
> Testing:
> 
> - [x] jdk_foreign  with -XX:-TieredCompilation (fastdebug)
> - [x] Tier1~3 on Unmatched board (release)

Looks reasonable.

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Marked as reviewed by fyang (Reviewer).

PR: https://git.openjdk.org/jdk/pull/12295