RFR: 8309502: RISC-V: String.indexOf intrinsic may produce misaligned memory loads

[Feilong Jiang]

On Mon, 5 Jun 2023 20:52:01 GMT, Vladimir Kempik <vkempik at openjdk.org> wrote:

> Please review this attempt to remove misaligned loads in String.indexOf intrinsic on RISC-V
> 
> Initialy found these misaligned loads when profiling finagle-http test from renaissance suite.
> The majority of trp_lam events (about 66k per finagle-http round) came at line 706 (https://github.com/openjdk/jdk/pull/14320/files#diff-35eb1d2f1e2f0514dd46bd7fbad49ff2c87703d5a3041a6433956df00a3fe6e6L706)
> The other two produced about 100 events combined.
> Later I've found this can partially be reproduced with StringIndexOf.advancedWithMediumSub.
> Numbers on hifive before and after applying the patch:
> 
> 
> Benchmark                                                  Mode  Cnt       Score      Error  Units
> StringIndexOf.advancedWithMediumSub                        avgt   25   47031.406 ±  144.005  ns/op
> 
> 
> After:
> 
> Benchmark                                                 Mode  Cnt       Score     Error  Units
> StringIndexOf.advancedWithMediumSub                       avgt   25    4256.830 ±  23.075  ns/op
> 
> 
> Testing: tier1 is clean on hifive, more tbd.

Looks good, I see some `load_4chr` at [1], could it also produce misaligned loads?

1. https://github.com/openjdk/jdk/blob/01455a07a7e1f15aed43cd47222047810c826abd/src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp#L675-L690

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PR Comment: https://git.openjdk.org/jdk/pull/14320#issuecomment-1578573385