RFR: 8309660: C2: failed: XMM register should be 0-15 (UseKNLSetting and ConvF2HF)

[Emanuel Peter]

On Thu, 8 Jun 2023 14:45:54 GMT, Emanuel Peter <epeter at openjdk.org> wrote:

> Context: `Float.floatToFloat16` -> `vcvtps2ph`.
> 
> **Problem**
> 
> vcvtps2ph
> pre=Assembler::VEX_SIMD_66
> opc=Assembler::VEX_OPCODE_0F_3A
> VEX.128.66.0F3A
> requires F16C
> 
> https://www.felixcloutier.com/x86/vcvtps2ph
> 
> So this is a non-AVX512 feature, and we should only use the registers `xmm0-15`.
> 
> There is also a AVX512 version, but it requires `AVX512VL and AVX512F`.
> 
> So on `x64`, we should only use registers `xmm0-15` if we do not have `AVX512VL`, and if we have it, then we can use `xmm0-31`.
> 
> **Suggested Solution**
> As @sviswa7 suggested, we should just use the `vlRegF` instead of `regF`, see discussion in comments.
> 
> **Testing**
> I simulated the patch on intel's `sde`. So now I'm confident that I don't generate code that uses `AVX512VL` registers (XMM16-31).
> 
> Running: tier1-6 + stress testing.

@merykitty I'm not sure if you deleted your comment, but you basically asked me to check if there are any other cases that need this fix.

I think this one is ok, because it already explicitly requires `avx512vl`.

instruct convF2HF_mem_reg(memory mem, regF src, kReg ktmp, rRegI rtmp) %{
  predicate((UseAVX > 2) && VM_Version::supports_avx512vl());


I'm not sure about all the vector cases, like this `instruct vconvHF2F(vec dst, vec src)`. Can someone tell me where to find the definition of register class `vec`, cannot seem to find it in `x86.ad`.

-------------

PR Comment: https://git.openjdk.org/jdk/pull/14379#issuecomment-1586746188