RFR: 8310192: RISC-V: Merge vector min & max instructs with similar match rules

[Fei Yang]

On Fri, 16 Jun 2023 09:27:39 GMT, Gui Cao <gcao at openjdk.org> wrote:

> Hi, We merged vector min and max instructions with similar matching rules in this PR, and modified some comments of the copy_memory function in stubGenerator_riscv.cpp.
> We can use Float256VectorTests.java Double256VectorTests.java to emit vmax_fp/vmin_fp nodes and the compilation log is as follows:
> 
> 13e     B22: #	out( B50 B23 ) <- in( B21 )  Freq: 76.431
> 13e     loadV V2, [R17]	# vector (rvv)
> 146     vmax_fp V3, V1, V2
> 15e     bgeu  R9, R13, B50	#@cmpU_branch  P=0.000001 C=-1.000000
> 
> 
> 13e     B22: #	out( B50 B23 ) <- in( B21 )  Freq: 76.431
> 13e     loadV V2, [R17]	# vector (rvv)
> 146     vmin_fp V3, V1, V2
> 15e     bgeu  R9, R13, B50	#@cmpU_branch  P=0.000001 C=-1.000000
> 
> Please take a look and have some reviews. Thanks a lot.
> 
> ## Testing:
> - [x] Tier1 tests (release)
> - [x] Tier2 tests (release)
> - [x] Tier3 tests (release)
> - [x] test/jdk/jdk/incubator/vector (fastdebug)

Marked as reviewed by fyang (Reviewer).

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PR Review: https://git.openjdk.org/jdk/pull/14510#pullrequestreview-1485563905