RFR: 8304258: x86: Improve the code generation of VectorRearrange with int and float [v2]

[Quan Anh Mai]

On Thu, 23 Mar 2023 16:21:03 GMT, Jatin Bhateja <jbhateja at openjdk.org> wrote:

>> Quan Anh Mai has updated the pull request with a new target base due to a merge or a rebase. The incremental webrev excludes the unrelated changes brought in by the merge/rebase. The pull request contains two additional commits since the last revision:
>> 
>>  - Merge branch 'master' into rearrangeI
>>  - improve rearrangeI
>
> src/hotspot/cpu/x86/assembler_x86.cpp line 4230:
> 
>> 4228: 
>> 4229: void Assembler::vpermps(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
>> 4230:   assert(vector_len <= AVX_256bit ? VM_Version::supports_avx2() : VM_Version::supports_evex(), "");
> 
> Instruction support 256 and 512 bit vectors only and assertion should comply with that.

I have fixed that

> src/hotspot/cpu/x86/x86.ad line 8645:
> 
>> 8643:     int vlen_enc = vector_length_encoding(this);
>> 8644:     if (vlen_enc == Assembler::AVX_128bit) {
>> 8645:       __ vpermilps($dst$$XMMRegister, $src$$XMMRegister, $shuffle$$XMMRegister, vlen_enc);
> 
> Since you are emitting different instruction to save on domain switch over penalty for > 128 bit vectors, same can be done for 128 bit vectors also, you may use vpshufd for integers.

I think `vpshufd` does not support variable indices so we can only use `vpermilps` here

> src/hotspot/cpu/x86/x86.ad line 8649:
> 
>> 8647:       __ vpermd($dst$$XMMRegister, $shuffle$$XMMRegister, $src$$XMMRegister, vlen_enc);
>> 8648:     } else {
>> 8649:       __ vpermps($dst$$XMMRegister, $shuffle$$XMMRegister, $src$$XMMRegister, vlen_enc);
> 
> Please move this to a macro assembly routine.

Done

-------------

PR Review Comment: https://git.openjdk.org/jdk/pull/13042#discussion_r1146653117
PR Review Comment: https://git.openjdk.org/jdk/pull/13042#discussion_r1146653363
PR Review Comment: https://git.openjdk.org/jdk/pull/13042#discussion_r1146653904