RFR: 8316592: RISC-V: implement poly1305 intrinsic [v3]

[Hamlin Li]

On Wed, 1 Nov 2023 02:16:07 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> null has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Replace slli/add sequence with shadd instruction
>
> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 4424:
> 
>> 4422:   void pack_26(Register dest0, Register dest1, Register dest2, Register src) {
>> 4423:     const Register t3 = x28;
>> 4424:     const Register t4 = x29;
> 
> Hardcoding is not nice here. Maybe add two extra formal parameters like `tmp1` and `tmp2` for this function? We could ask for two usable registers (with *++regs) in the caller and pass them to this function.

Seems the tmpx in generate_poly1305_processBlocks do not carry state for long time, maybe t1/t2 or t2 can be used here.
And as Fei indicated, better to passed in register by parameters.

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PR Review Comment: https://git.openjdk.org/jdk/pull/16417#discussion_r1378976607