RFR: 8319184: RISC-V: improve MD5 intrinsic

[Antonios Printezis]

On Thu, 2 Nov 2023 09:17:07 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Tweaks to the RISC-V MD5 intrinsic.
>> 
>> * do the loads from the buffer more incrementally instead of all in one go
>> * don't mask off the top 32 bits of a register before an addw instruction, as addw will ignore them anyway
>> * remove the rmask32 register, as the mask is not needed any more (only at the start / end and it's 
>> * cleanup some of the register usage
>
> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 3942:
> 
>> 3940: 
>> 3941:     // add i'th 32-bit integer to dest
>> 3942:     void addw(const Register dest, uint i, const Register rtmp) {
> 
> Can we give this function another name (Maybe something like `add_u32`) to avoid possible confusion with the `addw` assember function? Or simply inline the code into the caller?

@RealFYang Thanks for looking at this! I'll rename it as `add_u32`. I'd rather not inline it (even though it's only used in one place) not to exposed the `_regs` array.

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PR Review Comment: https://git.openjdk.org/jdk/pull/16453#discussion_r1380077959